EDN

Getting the most out of RTL logic synthesis

As chip designers, we take register-transfer-level logical synthesis for granted today. And that's a good thing. That means that we are all comfortable with it. I remember back in the early '90s when ...
Semiconductor Engineering

Logic Synthesis Basics For FPGA

In the early days of digital design, all circuits were designed manually. You would draw K-map, optimize the logic and draw the schematics. If you remember, we all ...
Nature

Reactive Systems Synthesis and Temporal Logic

Reactive systems synthesis is a rapidly evolving discipline that focuses on the automated construction of systems designed to interact continuously with complex and often unpredictable environments.
EDN

Control Synthesis Output with Combinatorial Logic in Procedural Code

While it is tempting to write RTL and let the synthesis tool take over, this isn’t the best way to get the results we want. In this article, we’ll learn how to create complex combinatorial code in ...
Electronic Design

In Adding Control-Logic Support, A High-Level Synthesis Tool Goes Full Chip

High-level synthesis (HLS), or the notion of synthesizing a design into RTL from a higher level of abstraction, has been gaining currency among design teams. For some time now, there have been ...