J-LINK REDUCES JTAG DEBUG PINCOUNT FROM 5 to 1! Pittsford, New York—Traditional JTAG boundary-scan testing normally takes up 5 valuable pins on an i.c., requires 5 resistors, and increases chip power.

This debugger was implemented and designed for the ATmega644 which utilizes its JTAG interface for communication as it sets breakpoints and access registers and memory in order to control program ...

Xilinx Vertex-II Pro platforms that support multiple PowerPC and MicroBlaze cores have a new weapon in the EMUL-PPC JTAG debugger. The package, including software support, handles hardware diagnostics ...

Over the last year or so we’ve noticed a definite uptick in the number of folks using OpenOCD on the Raspberry Pi. It’s a cheap and convenient solution for poking around with various microcontrollers ...

The PowerPC started out as a RISC challenger to the PC's XC86, developed by Apple, IBM, and Motorola. It lost that race, but it has become a major RISC for ICs, ASSPs, and cores. PowerPCs have a large ...

If not, it might be because you haven’t mastered the basics of JTAG and learned how to dump, or snarf, the firmware of an embedded device. This JTAG primer will get you up to snuff on snarfing, and ...