Given that my last couple of blogs on double patterning (DP) might have scared you to death, I figured it was time to bring you some good news. It is unavoidably true that double patterning layout ...

As the unstoppable progression of Moore’s law has driven the semiconductor technology roadmap farther and farther below 1 µm, a steady stream of engineering marvels has been required to produce ...

Double patterning is a class of technologies developed for photolithography to enhance the feature density of computer chips. The resolution of a photoresist pattern begins to blur at around 45 nm ...

Digital micromirror device-based maskless projection lithography (DMPL) has emerged as a transformative nanopatterning platform, yet faces fundamental challenges in resolving high-density ...

BELMONT, Calif.--(BUSINESS WIRE)--Nikon Corporation has announced they will provide an immersion scanner for Double Patterning, based on the successful NSR-S610C platform, to their customers in the ...

Sign-off enabling for 14nm FinFET includes decks for design rule checking with double patterning , layout vs. schematic checking, pattern matching-based verification, litho friendly design, and design ...